%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% % % Microcode definition for Zusie % By Fredrik Andersson - nablaman@gmail.com % % Microwords are 32 bits wide, which means that the individual % bytes in a microword can be addressed with 2 bits. % These are generated by control logic on the board. % What must be supplied from the outside are the IP and micro-IP % values. Microcode addressing works like this: % [ 8 bits instruction word ][ 5 bits micro-IP ][ 2 bits internal ] % This makes 8 + 5 + 2 = 15 = 32k microcode stored in a 62256 or similar. % % All offsets are in 32-bit microwords. % So h0 is the microcode for IP=0, % h20 for IP=1 and so on. % Each line represents a microword. % %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% #include signals.txt #define stride h20 %------------------------------------------- % Entry point for all microinstructions %------------------------------------------- @h0 ld_inc ld_i sel_pc sel_mem inhibit_i sel_pc sel_mem inhibit_i ld_pc sel_inc inhibit_i sel_inc inhibit_i 0 reset %------------------------------------------- % Load Literal to Registers A, B, C % Load Condition Codes from Registers %------------------------------------------- % 1 LDL->A @(h1 * stride) #include mc_ldl.txt ld_a % 2 LDL->B @(h2 * stride) #include mc_ldl.txt ld_b % 3 LDL->C @(h3 * stride) #include mc_ldl.txt ld_c % 6 LDC<-A @(h6 * stride) #include mc_ldc.txt sel_a % 7 LDC<-B @(h7 * stride) #include mc_ldc.txt sel_b % 8 LDC<-C @(h8 * stride) #include mc_ldc.txt sel_c %------------------------------------------- % Subroutines %------------------------------------------- % 0A CALL %@(ha * stride) %#include mc_call.txt % 0B RET %@(hb * stride) %#include mc_ret.txt % 0C CALLS @(hc * stride) #include mc_calls.txt % 0D RETS @(hd * stride) #include mc_rets.txt %------------------------------------------- % Push / pop %------------------------------------------- % 10 PUSHA @(h10 * stride) #include mc_push.txt sel_a % 11 PUSHB @(h11 * stride) #include mc_push.txt sel_b % 12 PUSHC @(h12 * stride) #include mc_push.txt sel_c % 13 POP->A @(h13 * stride) #include mc_pop.txt ld_a % 14 POP->B @(h14 * stride) #include mc_pop.txt ld_b % 15 POP->C @(h15 * stride) #include mc_pop.txt ld_c %------------------------------------------- % 16-bit increments %------------------------------------------- % 16 INCJ @(h16 * stride) #include mc_inc.txt sel_j ld_j % 17 DECJ @(h17 * stride) #include mc_inc.txt sel_j ld_j dec % 18 INCXY @(h18 * stride) #include mc_inc.txt sel_xy ld_xy % 19 DECXY @(h19 * stride) #include mc_inc.txt sel_xy ld_xy dec % 1a INCJ->XY @(h1a * stride) #include mc_inc.txt sel_j ld_xy % 1b DECJ->XY @(h1b * stride) #include mc_inc.txt sel_j ld_xy dec % 1c INCXY->J @(h1c * stride) #include mc_inc.txt sel_j ld_xy % 1d DECXY->J @(h1d * stride) #include mc_inc.txt sel_j ld_xy dec %------------------------------------------- % Read/write %------------------------------------------- % 20 RDJ->A @(h20 * stride) #include mc_read.txt sel_j ld_a % 21 RDXY->A @(h21 * stride) #include mc_read.txt sel_xy ld_a % 22 RDJ->B @(h22 * stride) #include mc_read.txt sel_j ld_b % 23 RDXY->B @(h23 * stride) #include mc_read.txt sel_xy ld_b % 24 RDJ->C @(h24 * stride) #include mc_read.txt sel_j ld_c % 25 RDXY->C @(h25 * stride) #include mc_read.txt sel_xy ld_c % 26 RDJ->X @(h26 * stride) #include mc_read.txt sel_j % 27 RDJ->Y @(h27 * stride) #include mc_read.txt sel_j ld_lo_xy % 28 WRJ<-A @(h28 * stride) #include mc_read.txt sel_j sel_a % 29 WRXY<-A @(h29 * stride) #include mc_write.txt sel_xy sel_a % 2a WRJ<-B @(h2a * stride) #include mc_write.txt sel_j sel_b % 2b WRXY<-B @(h2b * stride) #include mc_write.txt sel_xy sel_b % 2c WRJ<-C @(h2c * stride) #include mc_write.txt sel_j sel_c % 2d WRXY<-C @(h2d * stride) #include mc_write.txt sel_xy sel_c % 2e WRJ<-X @(h2e * stride) #include mc_write.txt sel_j % 2f WRJ<-Y @(h2f * stride) #include mc_write.txt sel_j sel_lo_xy %------------------------------------------- % Long branch instructions %------------------------------------------- % XXX: Make a faster version of unconditional br! % 30 BR @(h30 * stride) #include mc_br.txt % 31 BRZ @(h31 * stride) #include mc_br.txt bc_zero % 32 BRNZ @(h32 * stride) #include mc_br.txt bc_not_zero % 33 BRC @(h33 * stride) #include mc_br.txt bc_carry % 34 BRNC @(h34 * stride) #include mc_br.txt bc_not_carry % 35 BRS @(h35 * stride) #include mc_br.txt bc_sign % 36 BRNS @(h36 * stride) #include mc_br.txt bc_not_sign %------------------------------------------- % Short branch instructions %------------------------------------------- % 37 SBR @(h37 * stride) #include mc_sbr.txt % 38 SBRZ @(h38 * stride) #include mc_sbrc.txt bc_zero % 39 SBRNZ @(h39 * stride) #include mc_sbrc.txt bc_not_zero % 3a SBRC @(h3a * stride) #include mc_sbrc.txt bc_carry % 3b SBRNC @(h3b * stride) #include mc_sbrc.txt bc_not_carry % 3c SBRS @(h3c * stride) #include mc_sbrc.txt bc_sign % 3d SBRNS @(h3d * stride) #include mc_sbrc.txt bc_not_sign %------------------------------------------- % Move instructions %------------------------------------------- % 50 MOVB->A @(h50 * stride) #include mc_mov.txt sel_b ld_a % 51 MOVC->A @(h51 * stride) #include mc_mov.txt sel_c ld_a % 52 MOVX->A @(h52 * stride) #include mc_mov.txt ld_a % 53 MOVY->A @(h53 * stride) #include mc_mov.txt sel_lo_xy ld_a % 54 MOVA->B @(h54 * stride) #include mc_mov.txt sel_a ld_b % 55 MOVC->B @(h55 * stride) #include mc_mov.txt sel_c ld_b % 56 MOVX->B @(h56 * stride) #include mc_mov.txt ld_b % 57 MOVY->B @(h57 * stride) #include mc_mov.txt sel_lo_xy ld_b % 58 MOVA->C @(h58 * stride) #include mc_mov.txt sel_a ld_c % 59 MOVB->C @(h59 * stride) #include mc_mov.txt sel_b ld_c % 5a MOVX->C @(h5a * stride) #include mc_mov.txt ld_c % 5b MOVY->C @(h5b * stride) #include mc_mov.txt sel_lo_xy ld_c % 5c MOVA->X @(h5c * stride) #include mc_mov.txt sel_a % 5d MOVB->X @(h5d * stride) #include mc_mov.txt sel_b % 5e MOVC->X @(h5e * stride) #include mc_mov.txt sel_c % 5f MOVY->X @(h5f * stride) #include mc_mov.txt sel_lo_xy % 60 MOVA->Y @(h60 * stride) #include mc_mov.txt sel_a ld_lo_xy % 61 MOVB->Y @(h61 * stride) #include mc_mov.txt sel_b ld_lo_xy % 62 MOVC->Y @(h62 * stride) #include mc_mov.txt sel_c ld_lo_xy % 63 MOVX->Y @(h63 * stride) #include mc_mov.txt ld_lo_xy % 64 MOVXY->J @(h64 * stride) #include mc_mov.txt sel_xy ld_j % 65 MOVXY->S @(h65 * stride) #include mc_mov.txt sel_xy ld_sp % 66 MOVXY->P @(h66 * stride) #include mc_mov.txt sel_xy ld_pc % 67 MOVJ->XY @(h67 * stride) #include mc_mov.txt sel_j ld_xy % 68 MOVJ->S @(h68 * stride) #include mc_mov.txt sel_j ld_sp % 69 MOVJ->P @(h69 * stride) #include mc_mov.txt sel_j ld_pc % 6a MOVS->XY @(h6a * stride) #include mc_mov.txt sel_sp ld_xy % 6b MOVS->J @(h6b * stride) #include mc_mov.txt sel_sp ld_sp % 6c MOVS->P @(h6c * stride) #include mc_mov.txt sel_sp ld_pc % 6d MOVP->XY @(h6d * stride) #include mc_mov.txt sel_pc ld_xy % 6e MOVP->J @(h6e * stride) #include mc_mov.txt sel_pc ld_j % 6f MOVP->S @(h6f * stride) #include mc_mov.txt sel_pc ld_sp %------------------------------------------- % ALU single-operand instructions %------------------------ ------------------- #include mc_alu1.txt h80 alu_not #include mc_alu1.txt h90 alu_inc #include mc_alu1.txt ha0 alu_dec #include mc_alu1.txt hb0 alu_sr %------------------------------------------- % ALU two-operand instructions %------------------------------------------- #include mc_alu2.txt hc0 alu_and #include mc_alu2.txt hd0 alu_or #include mc_alu2.txt he0 alu_xor %------------------------------------------- % ALU ADD instruction (singled out since % they can meaningfully operate on the same % register twice). %------------------------------------------- % cc ADDAB @(hcc * stride) #include mc_alu2b.txt alu_a_to_1 alu_b_to_2 alu_add % cd ADDAC @(hcd * stride) #include mc_alu2b.txt alu_a_to_1 alu_c_to_2 alu_add % ce ADDBC @(hce * stride) #include mc_alu2b.txt alu_b_to_1 alu_c_to_2 alu_add % cf ADDAA @(hcf * stride) #include mc_alu2b.txt alu_a_to_1 alu_a_to_2 alu_add % dc ADDBB @(hcc * stride) #include mc_alu2b.txt alu_b_to_1 alu_b_to_2 alu_add % dd ADDCC @(hdd * stride) #include mc_alu2b.txt alu_c_to_1 alu_c_to_2 alu_add % de ADDA,B->MXY @(hde * stride) #include mc_alu2o.txt alu_a_to_1 alu_b_to_2 alu_add ld_mem sel_xy % df ADDA,C->MXY @(hdf * stride) #include mc_alu2o.txt alu_a_to_1 alu_c_to_2 alu_add ld_mem sel_xy % ec ADDB,C->MXY @(hec * stride) #include mc_alu2o.txt alu_b_to_1 alu_c_to_2 alu_add ld_mem sel_xy % ed ADDA,A->MXY @(hed * stride) #include mc_alu2o.txt alu_a_to_1 alu_a_to_2 alu_add ld_mem sel_xy % ee ADDB,B->MXY @(hee * stride) #include mc_alu2o.txt alu_b_to_1 alu_b_to_2 alu_add ld_mem sel_xy % ef ADDC,C->MXY @(hef * stride) #include mc_alu2o.txt alu_c_to_1 alu_c_to_2 alu_add ld_mem sel_xy % f0 ADDA,B->C @(hf0 * stride) #include mc_alu2o.txt alu_a_to_1 alu_b_to_2 alu_add ld_c % f1 ADDA,B->MJ @(hf1 * stride) #include mc_alu2o.txt alu_a_to_1 alu_b_to_2 alu_add ld_mem sel_j % f2 ADDA,C->B @(hf2 * stride) #include mc_alu2o.txt alu_a_to_1 alu_c_to_2 alu_add ld_b % f3 ADDA,C->MJ @(hf3 * stride) #include mc_alu2o.txt alu_a_to_1 alu_c_to_2 alu_add ld_mem sel_j % f4 ADDB,C->A @(hf4 * stride) #include mc_alu2o.txt alu_b_to_1 alu_c_to_2 alu_add ld_a % f5 ADDB,C->MJ @(hf5 * stride) #include mc_alu2o.txt alu_b_to_1 alu_c_to_2 alu_add ld_mem sel_j % f6 ADDA,A->B @(hf6 * stride) #include mc_alu2o.txt alu_a_to_1 alu_a_to_2 alu_add ld_b % f7 ADDA,A->C @(hf7 * stride) #include mc_alu2o.txt alu_a_to_1 alu_a_to_2 alu_add ld_c % f8 ADDA,A->MJ @(hf8 * stride) #include mc_alu2o.txt alu_a_to_1 alu_a_to_2 alu_add ld_mem sel_j % f9 ADDB,B->A @(hf9 * stride) #include mc_alu2o.txt alu_b_to_1 alu_b_to_2 alu_add ld_a % fa ADDB,B->C @(hfa * stride) #include mc_alu2o.txt alu_b_to_1 alu_b_to_2 alu_add ld_c % fb ADDB,B->MJ @(hfb * stride) #include mc_alu2o.txt alu_b_to_1 alu_b_to_2 alu_add ld_mem sel_j % fc ADDC,C->A @(hfc * stride) #include mc_alu2o.txt alu_c_to_1 alu_c_to_2 alu_add ld_a % fd ADDC,C->B @(hfd * stride) #include mc_alu2o.txt alu_c_to_1 alu_c_to_2 alu_add ld_b % fe ADDC,C->MJ @(hfe * stride) #include mc_alu2o.txt alu_c_to_1 alu_c_to_2 alu_add ld_mem sel_j